ACK! dAck! 2.0 Manuel d'utilisateur télécharger pdf (Page 21)

Philips Semiconductors

ISP1581

USB 2.0 HS interface device

Objective speciﬁcation Rev. 02 — 23 October 2000 21 of 73

9397 750 07648

9.3.5 Endpoint MaxPacketSize register (address: 04H)

This register determines the maximum packet size for all endpoints except Control 0.

The register contains 2 bytes and the bit allocation is given in Ta ble 22 .

Each time the register is written, the Buffer Length registers of all endpoints are

re-initialized to the FFOSZ ﬁeld value. The NTRANS bits control the number of

transactions allowed in a single micro-frame (for high-speed operation only).

Table 21: Buffer Length register: bit allocation

Bit 15 14 13 12 11 10 9 8

Symbol DATACOUNT[15:8]

Reset 00H

Bus reset 00H

Access R/W

Bit 7 6 5 4 3 2 1 0

Symbol DATACOUNT[7:0]

Reset 00H

Bus reset 00H

Access R/W

Table 22: Endpoint MaxPacketSize register: bit allocation

Bit 15 14 13 12 11 10 9 8

Symbol reserved reserved reserved NTRANS[1:0] FFOSZ[10:8]

Reset 0 0 0 00H 00H

Bus reset 0 0 0 00H 00H

Access R/W R/W R/W R/W R/W

Bit 7 6 5 4 3 2 1 0

Symbol FFOSZ[7:0]

Reset 00H

Bus reset 00H

Access R/W

Table 23: Endpoint MaxPacketSize register: bit description

Bit Symbol Description

15 to 13 reserved reserved

12 to 11 NTRANS[1:0] Number of Transactions (HS mode only):

0 — 1 packet per microframe

1 — 2 packets per microframe

2 — 3 packets per microframe

3 — reserved.

10 to 0 FFOSZ[10:0] FIFO Size: Sets the FIFO size in bytes for the indexed endpoint.

Applies to both HS and FS operation.

Remark: A FIFO size of zero will disable the endpoint.

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 72 73

Commentaires sur ces manuels

Pas de commentaire

ACK! dAck! 2.0 Manuel d'utilisateur Page 21

Commentaires sur ces manuels