ACK! dAck! 2.0 Manuel d'utilisateur télécharger pdf (Page 7)

Philips Semiconductors

ISP1581

USB 2.0 HS interface device

Objective speciﬁcation Rev. 02 — 23 October 2000 7 of 73

9397 750 07648

[1] Symbol names with an overscore (e.g. NAME) represent active LOW signals.

[2] All outputs and I/O pins can source 4 mA of current.

7. Functional description

The ISP1581 is a high-speed USB device controller. It implements the USB 2.0/1.1

physical layer, the packet protocol layer and maintains up to 16 USB endpoints

concurrently (2 control, 14 conﬁgurable).

USB Chapter 9

protocol handling is

executed by means of external ﬁrmware.

AD7 39 I/O bit 7 of multiplexed address/data

DATA0 40 I/O bit 0 of bidirectional data

DATA1 41 I/O bit 1 of bidirectional data

DGND 42 - digital ground

CC(5.0)

43 - supply voltage (3.3 or 5.0 V)

DATA2 44 I/O bit 2 of bidirectional data

DATA3 45 I/O bit 3 of bidirectional data

DATA4 46 I/O bit 4 of bidirectional data

DATA5 47 I/O bit 5 of bidirectional data

DATA6 48 I/O bit 6 of bidirectional data

DATA7 49 I/O bit 7 of bidirectional data

DATA8 50 I/O bit 8 of bidirectional data

DATA9 51 I/O bit 9 of bidirectional data

DATA10 52 I/O bit 10 of bidirectional data

DATA11 53 I/O bit 11 of bidirectional data

DATA12 54 I/O bit 12 of bidirectional data

DATA13 55 I/O bit 13 of bidirectional data

DATA14 56 I/O bit 14 of bidirectional data

DATA15 57 I/O bit 15 of bidirectional data

CC(3.3)

58 - supply voltage (3.3 V ± 10%); supplies internal digital

circuits

XTAL2 59 O crystal oscillator output (12 MHz); connect a fundamental

parallel-resonant crystal; leave this pin open when using an

external clock source on pin XTAL1

XTAL1 60 I crystal oscillator input (12 MHz); connect a fundamental

parallel-resonant crystal or an external clock source

(leaving pin XTAL2 unconnected)

DGND 61 - digital ground

WAKEUP 62 I wake-up input (edge triggered); a LOW-to-HIGH transition

generates a remote wake-up from ‘suspend’ state

SUSPEND 63 O ’suspend’ state indicator output (4 mA); used as a power

switch control output (active LOW) for powered-off

application or as a resume signal to the CPU (active HIGH)

for powered-on application

CC(5.0)

64 - supply voltage (3.3 or 5.0 V)

Table 2: Pin description for LQFP64

…continued

Symbol

[1]

Pin Type

[2]

Description

1 2 3 4 5 6 7 8 9 10 11 12 ... 72 73

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ACK! dAck! 2.0 Manuel d'utilisateur Page 7

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