ACK! dAck! 2.0 Manuel d'utilisateur télécharger pdf (Page 63)

Philips Semiconductors

ISP1581

USB 2.0 HS interface device

Objective speciﬁcation Rev. 02 — 23 October 2000 63 of 73

9397 750 07648

(1) Programmable polarity: shown as active LOW.

Fig 26. UDMA timing: drive terminating a burst during a write command.

DREQ (drive)

DACK

(1)

(host)

DIOR (host)

DIOW (host)

DATA

[

15:0

]

(host)

[

2:0

]

and CS

[

1:0

]

IORDY (drive)

su1

CRC

d10

MGT512

(1) Programmable polarity: shown as active LOW.

Fig 27. UDMA timing: host terminating a burst during a read command.

DREQ (drive)

DACK

(1)

(host)

DIOR (host)

DIOW (host)

DATA

[

15:0

]

(drive)

[

2:0

]

and CS

[

1:0

]

IORDY (drive)

su1

CRC

MGT513

d10

1 2 ... 58 59 60 61 62 63 64 65 66 67 68 ... 72 73

1. General description 1
4. Ordering information 2
2. Features 2
3. Applications 2
5. Block diagram 3
6. Pinning information 4
6.2 Pin description 5
7. Functional description 7
7.1 USB 2.0 transceiver 8
Philips Semiconductors 10
7.10 System Controller 10
8. Modes of operation 11
9. Register descriptions 11
…continued 12
9397 750 07648 13
9.4 DMA registers 24
9.5 General registers 37
10. Limiting values 42
11. Static characteristics 42
12. Dynamic characteristics 44
12.1 High-speed signals 46
12.2 Timing symbols 51
12.3 Parallel I/O timing 52
12.4 DMA timing 54
13. Application information 65
14. Test information 66
15. Package outline 67
16. Soldering 68
16.4 Manual soldering 69
17. Revision history 70
18. Data sheet status 71
19. Deﬁnitions 71
20. Disclaimers 71
21. Trademarks 71
Contents 73

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ACK! dAck! 2.0 Manuel d'utilisateur Page 63

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